基于FPGA+CPCI的WTB通信板设计  

Design of WTB Communication Board Based on FPGA+CPCI

作　　者：田源[1] 王立德[1] 严翔[1] 申萍[1] 

机构地区：[1]北京交通大学电气工程学院,北京100044

出　　处：《机车电传动》2014年第4期28-32,56,共6页Electric Drive for Locomotives

基　　金：中央高校基本科研业务费专项资金资助项目(E12JB00140)

摘　　要：为了提升TCN网关的稳定性和高效性,提出一种基于FPGA+CPCI控制芯片的WTB通信板设计方案。在WTB物理层和CPCI驱动接口硬件设计的基础上,重点介绍了WTB介质附件单元MAU的数据收发和CPCI本地总线时序控制的设计。文章遵循IEC61375-1标准,利用FPGA的有限状态机方法实现曼彻斯特编解码,并分析了本地总线的逻辑时序,利用状态机转换实现FPGA与CPCI总线间的数据读写。最后在QuartusⅡ仿真环境下验证了方案的有效性,结果满足IEC61375对帧的要求以及PCI9030手册对本地控制信号的时序约束。To improve reliability and efficiency of the gateway effectively, a framework composed by FPGA＋CPCI control chip was proposed. Based on the hardware design of WTB physical layer and CPCI drive interface, data transceiver of medium attachment unit （MAU） and the timing control of the local bus were introduced in emphasis. According to the standard IEC61375-1, Manchester codec and the data transmission of local bus were realized by introducing finite state machine （FSM）, and data read-write of FPGA to CPCI bus was accomplished by state machine transition. Finally, these designs were tested and verified in Quartus Ⅱ simulation environment, and the results meet the requirements of IEC61375 for frames and timing constraints of local control signals in PC19030 data book.

关 键 词：CPCI总线 绞线式列车总线 有限状态机 本地总线 

分 类 号：TP393[自动化与计算机技术—计算机应用技术]