基于现场可编程门阵列的非周期伪码测控同步系统的实现  

Achieve of Synchronous Non-periodic Pseudo-code TT&C System Based on FPGA

作　　者：方金辉[1] 

机构地区：[1]中国科学院电子学研究所,北京100190

出　　处：《军民两用技术与产品》2014年第12期56-58,共3页Dual Use Technologies & Products

摘　　要：扩频码周期与信息码周期之比非周期将会导致相邻的信息码对应的扩频码不同,常规的同步方法不再适用。为解决非周期性直扩信号伪码快速捕获和同步的难题,提出了采用每1/4个码元积分,然后取绝对值相加的方法来剥离信息位,进行伪码粗捕和跟踪,每1/2个码元积分进行位同步,最后将位同步信息进行载波跟踪完成整个同步过程的方法。该方法运算速度快,对符号位不敏感,能够消除非周期直序列扩频带来的影响。现场可编程门阵列(FPGA)实现结果表明:该方法在信噪比大于-20d B条件下,对伪码长度为1023的M序列非周期直序列扩频,能做到可实现无误码同步性能。The fact that the ratio of information code and spreading code is non-periodic will always make the adjacent information code corresponding to a different spreading code, therefore, here the conventional synchronization method no longer works. To solve the problems, a method of integrating every 1/4 symbols, and taking the sum of the absolute value to release the information bits is proposed for Pseudo-code coarse capture and tracking. Every 1/2 symbols for the bit synchronization is integrated, and the previous synchronization results are applied to the carrier tracking for the synchronization process. The method has many advantages, such as fast operation, non-sensitive to the sign bits, the ability of eliminating non-periodic impact of Direct Sequence Spread Spectrum. FPGA implementation results show that the a periodic DS signal with m sequence period 1023 can be estimated without any errors for the SNR which are above -20dB.

关 键 词：非周期 直序列扩频 伪码同步 FPGA实现 

分 类 号：V243.1[航空宇航科学与技术—飞行器设计]