基于BIST的NoC系统通信链路测试研究  

Test of NoC System Communication Link Based on BIST

作　　者：万春霆[1] 杨娟[1] 

机构地区：[1]桂林电子科技大学电子工程与自动化学院,广西桂林541004

出　　处：《电子科技》2014年第10期167-170,174,共5页Electronic Science and Technology

基　　金：广西研究生教育创新计划基金资助项目(YCSZ2013070)

摘　　要：采用内建自测试技术,完成了对NoC系统通信链路的测试。测试内容包括路由节点与其之间链路的测试,以及其与资源节点之间链路的测试。文中用硬件描述语言Verilog HDL完成各个测试模块的设计,用Quartus II软件自带的逻辑分析仪在基于FPGA的NoC系统硬件平台上完成测试。该测试方法不仅提高了故障覆盖率,还大幅降低了测试时间。With the development of Network-on-chip（NoC） system,it is necessary to test the Network-on-chip communication link. In this paper,the Build-In Self Test（Build-In Self Test,BIST） technology has been used to complete the communication link testing of the NoC system. The testing includes the link testing between the router node and the testing between a router node and the resource node which is connected with it. Verilog HDL language described with hardware is used to complete the design of each testing module. Then the logic analyzer with Quartus II software is used to complete the testing on NoC system hardware platform based on FPGA. The test method not only improves the fault coverage,but also greatly reduces testing time.

关 键 词：片上网络 内建自测试 通信架构 FPGA 

分 类 号：TP306[自动化与计算机技术—计算机系统结构]