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机构地区:[1]国防科技大学计算机学院,湖南长沙410073
出 处:《计算机工程与设计》2014年第10期3435-3439,共5页Computer Engineering and Design
基 金:国家自然科学基金项目(61070036)
摘 要:针对高性能多核DSP的需求,设计一种计数宽度和时钟输入可伸缩且功能增强型的定时器,实现定时器不同数据宽度在多种模式下的计数和定时功能。通过对两个32位计数寄存器的组合与分拆,形成多种定时器模式,满足DSP对定时器多种不同功能的要求,提高计数效率;设计实现定时器的看门狗和事件触发功能。实验结果表明,该定时器具有可伸缩、功能强、功耗低等特点。According to the needs of multi-core DSP with high performance ,a function enhanced timer that was scalable for the width of count and the input of clock was designed .The counting and timing functions with different data widths in a variety of modes was implemented .To meet DSP requirements of multi-functions and to improve the counting efficiency ,two 32-bit counter registers were combined or split to form a variety of timer modes .In addition ,the watchdog and event-triggered functions were designed . Experimental results show that the timer is characterized by scalability ,multifunction and lower power consumption .
分 类 号:TP302[自动化与计算机技术—计算机系统结构]
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