高清视频编码存储接口的设计与实现  

Design and Realization of Encoding Storage Interface of High-definition Video

作　　者：卢俊[1] 田泽[1] 陈威宇[1] 杜斐[1] 

机构地区：[1]中航工业西安航空计算技术研究所,陕西西安710068

出　　处：《计算机技术与发展》2014年第10期75-79,共5页Computer Technology and Development

基　　金："十二五"微电子预研(51308010601);总装2012预研基金(9140A08010712HK61095);中国航空工业集团公司创新基金(2010BD63111)

摘　　要：视频编码存储器接口是H.264高清视频编码系统的关键模块,用于快速高效地存储和读取编码过程中产生的大量中间数据(其中主要包括运动估计、宏块信息、去块滤波和码流数据等)。目前普遍采用的片外SRAM或SDRAM进行数据缓存的方案工作频率低,大数据量和编码实时性需求难以满足,这使得高清存储接口的性能成为系统设计的瓶颈。文中提出了基于DDR2控制器的存储接口方案设计和电路实现,还系统地描述了存储器接口的时序。通过后仿真验证和流片测试,证明文中提出的设计方案,划分存储器接口的子模块结构合理;实现的电路能有效地完成高清视频实时编码。The memory interface is the key module in H. 264 high-definition encoding system to quickly and efficiently store and read the mass of data in encoding,including motion estimation,macroblock information,deblock filtering,code stream data. At present,the scheme of memories like SRAM and SDRAM for data caching,which has been widely used,exists the problem of low working frequency and not meeting the needs of mass data and real-time encoding,making the high-definition memory interface performance has become the bottle-neck of system design. In this paper,propose the design and circuit implementation for memory interface scheme based on DDR2,and de-scribe the time sequence of memory interface systemically. The result of post-simulation and chip function tests have proved that the module has a good structure. The circuit can achieve the real time encoding in HD video.

关 键 词：高清视频 固件 控制器 运动估计 宏块 仲裁 自测试 

分 类 号：TP302[自动化与计算机技术—计算机系统结构]