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作 者:卢佳欣[1] 周志刚[1] 王丽云[1] 曾建明[1] 陈圣吉[1]
机构地区:[1]中国科学院上海微系统与信息技术研究所宽带无线技术实验室,上海200050
出 处:《高技术通讯》2014年第9期922-927,共6页Chinese High Technology Letters
基 金:中科院战略性先导科技专项(XDA06011100);中科院重点部署(KGZD-EW-103-5(4))资助项目
摘 要:针对E波段微波传输系统中发送滤波模块实现时存在的硬件复杂度高和采样率不匹配等问题,提出一种基于查表法的"零乘法"解决方案,并设计出了适合现场可编程门阵列(FPGA)实现的发送滤波器硬件结构。对这种硬件结构进行了实现复杂度理论分析、MATLAB仿真及FPGA开发板评估验证,结果表明,该结构设计能同时完成信号成型滤波与重采样,相比于传统基于卷积的方案仅占用16.7%的加法器资源且不需要任何乘法运算,具有复杂度低、实时性高的特点。To solve the problems of high hardware complexity and sampling rate mismatch in the implemention of a transmitfilter module for E-band microwave transmission systems, a "zero multiplication" solution based on look-up table was proposed, and a hardware structure suitable for a transmit-filter' s implementation using the mode of fieldprogrammable gate array (FPGA) was designed. The theoretical hardware complexity analysis of the hardware structure, with its MATLAB simulation and FPGA assessments, were performed, and the results showed that the proposed structure completed the signal shaping filtering and resampling simultaneously with the low hardware complexity and high real-time performance. Compared with conventional convolutional based solutions, the proposed solution used only 16.7% of addition operation, with no mutiplexing operation being included.
关 键 词:E波段 微波 发送滤波 成型滤波 重采样 采样率转换 查表法
分 类 号:TN713[电子电信—电路与系统]
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