采用关键路径漏电流变化分析的集成电路老化预测方法  

IC Aging Predicting Using Leakage Change of Critical Paths

作　　者：邱吉冰[1,2,3] 韩银和[1,2] 靳松[4] 李晓维[1,2] 

机构地区：[1]中国科学院计算技术研究所计算机体系结构国家重点实验室,北京100190 [2]中国科学院大学,北京100049 [3]北京计算机技术及应用研究所研发中心,北京100854 [4]华北电力大学电气与电子工程学院,保定071003

出　　处：《计算机辅助设计与图形学学报》2015年第2期371-378,共8页Journal of Computer-Aided Design & Computer Graphics

基　　金：国家自然科学基金(61076037)

摘　　要：为了应对集成电路老化对电子系统可靠性带来的威胁,提出一种应用关键路径漏电流变化进行负偏置温度不稳定性老化预测的方法.首先用被测芯片在一组测量向量敏化下的漏电流变化构成一个方程组,通过解方程组得到关键路径门电路的漏电流变化;然后通过漏电流变化与时延变化的关联模型,将漏电流变化转换得到门电路延迟变化;最后通过关键路径延迟变化来预测电路老化.对实验电路的仿真结果表明,该方法可用来预测负偏置温度不稳定性引起的电路老化,并且可通过增加测量时间来避免工艺偏差对预测精度的影响.Negative bias temperature instability （NBTI） has become a serious concern for the lifetime reliabilityof integrated circuits. In this paper, we propose to use the isolated leakage change in critical paths from full-chipleakage measurement result to predict NBTI-induced circuit aging. The chip-level leakage change under a set ofmeasurement vectors are firstly formulated as an equation set. Solving this equation set can obtain leakage changein the gates along the critical paths. Then, we predict delay degradation on arbitrary critical path based on the relationshipbetween leakage change and delay increase. Experimental results demonstrated that our scheme caneffectively predict NBTI-induced circuit aging with acceptable accuracy loss. The accuracy loss induced by processvariation can be avoided through increasing measurement time.

关 键 词：负偏置温度不稳定性 漏电流 老化 工艺偏差 

分 类 号：TP306.2[自动化与计算机技术—计算机系统结构]