C频段宽带低杂散频率合成器的设计与实现  

Design and implementation of broad-band and low-spurious frequency synthesizer of C-band

作　　者：鲁纯[1] 韩周安[1] 

机构地区：[1]电子科技大学电子工程学院,四川成都610054

出　　处：《现代电子技术》2015年第3期87-89,94,共4页Modern Electronics Technique

摘　　要：在此介绍了小数分频锁相频率合成器的相关理论。设计一个带宽为580 MHz、杂散抑制度≤-60 d Bc、相位噪声≤-85 d Bc/Hz@10 k Hz的C频段宽带低杂散频率合成器。利用双环锁相频率合成技术和小数分频锁相技术,实现了宽带、低杂散的锁相频率合成器的设计。最后经过测试近端杂散指标≤-60 d Bc,远端杂散指标≤-70 d Bc,偏移10 k Hz的相位噪声为-89.95 d Bc/Hz,技术指标都优于设计要求。The theory related to fractional frequency division phaselocked frequency synthesizer is introduced in this paper. A broadband and lowspurious frequency synthesizer was designed,whose bandwidth is 580 MHz,spurious suppression level≤-60 dBc and phase noise≤-85 dBc/Hz@10 kHz. The design of broadband and lowspurious phaselocked frequency synthesizer was realized by means of dualloop phaselocked frequency synthesis technique and fractional frequency division phaselocked technique. The testing results prove that the nearend spurious suppression level is ≤-60 dBc,the farend spurious suppression level is ≤-70 dBc and the phase noise is -89.95 dBc/Hz@10 kHz. All the technical indexes are far superior to the design requirement.

关 键 词：宽带 低杂散 小数分频 锁相环 频率合成器 

分 类 号：TN74-34[电子电信—电路与系统]