基于SystemVerilog可重用测试平台的实现  

The implementation of a reusable testbench based on System Verilog

作　　者：王鹏[1] 刘万和[2] 刘锐[2] 田毅[1] 

机构地区：[1]中国民航大学,民用航空器适航审定技术与管理研究中心,天津市民用航空器适航与维修重点实验室,天津300300 [2]中国民航大学安全科学与工程学院,天津300300

出　　处：《电子技术应用》2015年第2期61-64,共4页Application of Electronic Technique

基　　金：国家自然科学基金(U1333120);中央高校基本科研基金(3122014D046)

摘　　要：对于中小型设计,传统的验证效率低、可重用性差,而基于方法学的高级验证测试平台搭建较繁琐,验证流程不太灵活。以ARINC429收发器IP核为验证对象,采用System Verilog语言,通过层次化设计,改善工程组织架构,运用虚接口与回调等关键技术,实现了一种可重用测试平台。将不同的测试案例在测试平台上运行,结合断言与覆盖率驱动等验证技术完成了对ARINC429收发器IP核的功能验证,代码覆盖率和功能覆盖率均达到100%。实践表明,该测试平台具有良好的可重用性、易操作性,验证效率较高。For small and medium-sized design, the traditional verification has low efficiency and poor reusability, while the advanced methodology-based verification is a bit complicated to build testbench, and the verification flow is not very flexible. The implementation of a reusable testbench is presented in this paper. The testbench is used to verify the IP core of ARINCg29 transceiver, and it is implemented by employing the SystemVerilog language, designing the hierarchical structure, improving the ar- chitecture of project, and adopting key technology such as virtual interface and callback. With the assertions and coverage-drlven verification technology, the functional verification is completed by running different testcases on this testbench, both code coverage and functional coverage are 100%. The practice shows that the testbench is reusable, easy to operate, and efficient.

关 键 词：验证 SYSTEMVERILOG 测试平台 可重用 

分 类 号：TN402[电子电信—微电子学与固体电子学]