一种Flash型FPGA单粒子效应测试方法设计及验证  

Design and verification of test method for the single event effect in flash-based FPGA

作　　者：杨振雷[1,2] 王晓辉[1,2] 苏弘[1] 刘杰[1] 杨海波[1,2] 成科[1,3] 童腾[1,2] 

机构地区：[1]中国科学院近代物理研究所,兰州730000 [2]中国科学院大学,北京100049 [3]西北师范大学,兰州730000

出　　处：《核技术》2015年第2期37-43,共7页Nuclear Techniques

基　　金：国家自然科学基金(No.11079045;No.11305233)资助

摘　　要：随着现场可编程门阵列(Field Programmable Gate Array,FPGA)在现代航天领域的广泛应用,FPGA的单粒子效应(Single Event Effect,SEE)逐渐成为人们的研究热点。选择Microsemi公司Flash型FPGA分布范围最广的可编程逻辑资源VersaTile和对单粒子效应敏感的嵌入式RAM单元RAM Block作为单粒子效应的主要测试对象,提出了两种不同的单粒子效应测试方法;然后,使用仿真工具ModelSim对提出的两种电路的可行性进行了仿真验证;最后,基于自主研发的实验测试平台,在兰州重离子加速器(Heavy Ion Research Facility in Lanzhou,HIRFL)上使用86Kr束进行了束流辐照实验,实验结果表明,测试方法合理有效。Background： With the increased application of Field Programmable Gate Array （FPGA） in the field of spaceflight, Single Event Effect （SEE） of FPGA is attracting more and more attentions recently, Purpose： The aim is to study single event effect in flash-based FPGA manufactured by Microsemi. Methods： VersaTile and RAM Block from the flash-based FPGA are selected as the research object. First of all, the simulation verification of the method was performed by using ModelSim toolkit. Then the experimental tests of FPGA samples were carried out using SEE testbed based on the Heavy Ion Research Facility in Lanzhou （HIRFL）. Results and Conclusion： The simulation results verify that the test methods are effective, and the Single Event Upset （SEU） are detected timely and accurately. Experimental results on the SEE test base using 86Kr of HIRFL showed its rationality and validation.

关 键 词：现场可编程门阵列 单粒子效应 VERSATILE RAM BLOCK 

分 类 号：TN386[电子电信—物理电子学]