基于FPGA的AD采样设计  

Design of AD SamplingBased on FPGA

作　　者：许孟杰[1] 刘文臣 刘云[1] 

机构地区：[1]武汉数字工程研究所,武汉430074 [2]大连船舶重工集团有限公司,大连116000

出　　处：《舰船电子工程》2015年第1期114-118,共5页Ship Electronic Engineering

摘　　要：随着现代通信技术的发展,AD信号的实时采样和有效处理在数字化信号接收机的设计中起到重要作用[1]。提出了一种基于FPGA的AD采样设计,给出了同步采样时钟设计方案及FPGA对AD7656的相关配置方法,并对采样数据进行了正弦载波调制和低通滤波处理,最终在Matlab中显示处理后的数据,结果显示该设计方案简单有效,通用性较强。Along with the development of the communication technology ,Real‐time AD Sampling and the effective pro‐cessing play an important role in the design of digital signal receiver .A kind of AD Sampling based on FPGA is proposed , the design of the synchronous sampling clock and FPGA configuration method for the AD7656 is proposed ,the sampling data are processed by sine carrier modulation and low‐pass filtering .Finally ,the processed data are shown in the Matlab .The ex‐periment results show that the design is simple and effective ,highly versatile .

关 键 词：FPGA AD7656 AD采样 MATLAB仿真 

分 类 号：TP336[自动化与计算机技术—计算机系统结构]