基于Vivado HLS的AC97音频系统设计  

A Design of AC97 Audio System Based on Vivado HLS

作　　者：徐家惠 戚海峰[1] 高健[1] 庄建军[1] 陈毅煌[1] 

机构地区：[1]南京大学电子科学与工程学院,江苏南京210093

出　　处：《实验室研究与探索》2014年第12期35-38,共4页Research and Exploration In Laboratory

基　　金：江苏省高等教育教改研究立项课题(2013JSJG169)

摘　　要：介绍一种基于FPGA的AC97音频系统设计。系统的核心部件采用Xilinx Atlys的板载Spartan6 XCSLX45芯片,使用的工具为Xilinx的高层次综合技术Vivado HLS。首先使用C/C++代码编写的算法描述系统的FIR滤波器;然后按照Vivado HLS编译工具的规范,将程序代码转换为RTL模型,快速、直接地生成对应左右声道的FIR IP核和综合结果;再结合互连的Micro Blaze处理器IP核,处理一段立体声音乐信号,通过这种软硬件协同设计的方法,实现了音频滤波系统由现有算法向高性能的FPGA系统中移植的设计。结果表明,系统能够有效地滤除指定音频中的噪声,并且通过优化设计和架构探索,可以获得最佳资源消耗和性能优化的组合。The design of FPGA-based AC97 audio system is introduced. The key components of the system are Spartan6XCSLX45 chip on Xilinx Atlys board,and use the high-level synthesis（ HLS） technology of Xilinx. We directly describe the FIR filter in the form of C / C ＋ ＋ language,then it is changed into RTL model according to the specifications of Vivado HLS. Subsequently,the left and right FIR IP cores together with the outcome of synthesis are created in a quick and straight way. Furthermore,the interconnected Micro Blaze processor succeeds in processing a piece of stereo audio signal. We apply hardware and software co-design and co-verification to accomplish the design of audio filtering system and realize the transformation from the existing algorithm to high-performance FPGA system. Experiments show that the audio system can get rid of the noise from the specified audio. By means of optimized design and architecture exploration,we are able to achieve the best combination of resource consumption and performance optimization. As a result,it fully shows the superiority of embedded system software and hardware of collaborative design based on high level synthesis tools of Vivado HLS.

关 键 词：VIVADO HLS FPGA MICROBLAZE 软硬件协同设计 IP核 

分 类 号：TN391.9[电子电信—物理电子学]