一种CORDIC协处理器核的设计与实现  

The design and realization of a CORDIC coprocessor core

作　　者：邓凌煊 安军社[2] 

机构地区：[1]中国科学院大学,北京100190 [2]中国科学院空间科学与应用研究中心,北京100190

出　　处：《电子设计工程》2015年第2期155-159,共5页Electronic Design Engineering

摘　　要：航天导航计算机、数管系统需要进行大量实时数学运算,而目前绝大多数CPU缺乏对三角函数及超越函数的硬件支持。纯软件实现这些基本函数会占用大量的CPU资源。针对这一情况提出了一种基于CORDIC算法的协处理器核。该核可以提供向量旋转、常用三角函数以及exp、sqrt、ln运算,并且其精度可以进行配置。并且该协处理器通过降低与CPU的交互复杂度,提高了其实时性。该IP核可以较容易地集成进航天电子系统常用的FPGA中,具有高运行频率和低资源占用率,可以被广泛地应用于有高计算需求的嵌入式中,具有较高的工程价值。Navigation computers and data handling systems on spacecrafts usually need to do large amount of real-time data processing. However, most CPUs lack the hardware support for basic functions like trigonometric and transcendental functions, while it would cost CPUs quite a lot of cycles to calculate those function with pure software methods. To solve this problem, we proposed a coprocessor IP based on the CORDIC algorithm. This coprocessor offers functions including vector rotation, trigonometric functions and other functions like exp, sqrt, In, and its accuracy is configurable. Also, this IP tries to lower the latency of operations by cutting the number of transactions between the coprocessor and CPU. Moreover, this coprocessor can be easily integrated into commonly used spacecraft level FPGAs and can run at high clock rate while consuming few resources. This makes this core widely applicable for computation intense application and thus of very high engineering value.

关 键 词：FPGA IP核 CORDIC 协处理器 

分 类 号：TN492[电子电信—微电子学与固体电子学]