SoC仿真验证中多核技术的研究与应用  

Research and application of multi-core technology in SoC verification

作　　者：刘瑞 邵智勇 康春雷 李斌 

机构地区：[1]芯原股份有限公司,上海201203

出　　处：《现代电子技术》2015年第6期126-128,132,共4页Modern Electronics Technique

摘　　要：随着SoC设计规模的日益增大,结构逐渐复杂,仿真验证已经成为Soc设计过程中重要的环节,其所需时间往往成为整个设计周期的瓶颈,因而研究和应用能够加快验证仿真速度的技术变得愈发重要。Synopsys公司的仿真工具VCS所提供的多核技术就是利用目前计算机所拥有的多个处理器核并行工作,以达到对仿真速度的提升。通过在实际项目中分析和使用多核技术中的设计级并行仿真方法,证明了该多核技术的可行性和有效性。With the increasing enlargement of SoC design scale and the gradual complexity of its structure,the verification simulation has become an important part of the SoC design process,and its required time often becomes a bottleneck of the en？tire design cycle,so the research and application of the technology that can speed up the simulation verification is imperative. The multi？core technology offered by Synopsys Company’s simulation tool VCS makes the multiple processors working in parallel to achieve the lifting of the simulation speed. The feasibility and effectiveness of the multi？core technology was proved by analy？sis in actual project and the design level parallelism（DLP）method which is one of the multi？core technologies.

关 键 词：SOC验证 VCS 多核技术 设计级并行 

分 类 号：TN710-34[电子电信—电路与系统]