抗干扰数据电能校验调度嵌入式系统设计  

Anti Interference Design of Electric Power Dispatching Data Verification of Embedded System

作　　者：王亚林[1] 郭芳[1] 许雪林[1] 

机构地区：[1]福建工程学院信息科学与工程学院,福州350008

出　　处：《科技通报》2015年第4期136-138,共3页Bulletin of Science and Technology

摘　　要：提出一种基于S3C6410A的抗干扰数据电能校验调度嵌入式系统的设计,通过抗干扰数据的检测,对检测参数进行数据电能校验调度,建立一个基于S3C6410A抗干扰核心处理器与嵌入式操作系统的设计平台,利用高效能的方法检测干扰数据,通过对抗干扰数据的分析,并进行电能校验调度,建立嵌入式系统设计程序,完成对其数据参数进行分析的过程。仿真实验表明,基于S3C6410A的抗干扰数据电能校验调度嵌入式系统能够通过定义抗干扰数据模型来实现对旧方法的改变,且可灵活增加或删除相应验证的能力,满足嵌入式系统设计模型重复验证和评估的要求,从而得到更为高性能、低功耗、低成本的抗干扰数据电能校验调度嵌入式系统,促进了嵌入式系统设计方法的新发展。The embedded system design system with limited resources and high reliability requirements for the operating system and processor weak anti-interference ability. For this, put forward a kind of anti-interference power calibration data scheduling based on S3C6410 A embedded system design, through the establishment of a core processor and embedded operating system based on S3C6410 A anti-interference of embedded development module, the interference data were listening to intercept the process of data analysis. Simulation experiments show that the anti-interference power calibration data scheduling based on S3C6410 A embedded system can be implemented by defining the anti-interference data model to the change of the old method, and the flexible ability to add or delete the corresponding verification, validation and repeatedly embedded system design model assessment requirements, so as to get more.

关 键 词：嵌入式系统 抗干扰数据 电能校验 

分 类 号：TU22[建筑科学—建筑设计及理论]