基于FPGA的SDR FM接收机的设计  

Design of SDR FM Receiver Based on FPGA

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作  者:张俊涛[1] 薛莹[1] 艾春艳[1] 

机构地区:[1]陕西科技大学电气与信息工程学院,西安710021

出  处:《电子器件》2015年第2期332-337,共6页Chinese Journal of Electron Devices

摘  要:针对模拟元件制做的传统接收机的相关设备由于工作频率较高导致对元件参数要求高,电路布局布线困难等问题,提出一种利用FPGA芯片作为接收机的重要组成部分,结合简单外围硬件电路共同组成接收机的新方法。通过FPGA的差分I/O引脚完成接收机的模数转换功能,在集成设计环境Vivado中通过调用IP核的方法实现数字下变频和信号解调等功能。实验结果表明,该系统具有成本低、响应快、可靠性高的特点。The high operating frequency of the traditional receiver and related equipment made by analog components leads to high requirements of the component parameters and circuit layout. Focused on this problem,a new method is presented by using a high-speed digital processor chip FPGA as an important part of the receiver,combined the simple peripheral hardware circuit into the complete receiver. FPGA differential I / O pins can be used as a comparator to complete the conversion function; the method of invocating IP core in Vivado integrated design environment can realize the digital down-conversion and signal demodulation function. The experimental results show that,the system has the characteristics of low cost,fast response,high reliability.

关 键 词:软件无线电 数字信号处理 FPGA 数模转换 IP核 接收机 

分 类 号:TN851[电子电信—信息与通信工程]

 

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