Novel substrate trigger SCR-LDMOS stacking structure for high-voltage ESD protection application  

作　　者：马金荣 乔明 张波 

机构地区：[1]State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China

出　　处：《Chinese Physics B》2015年第4期394-398,共5页中国物理B（英文版）

摘　　要：A novel substrate trigger semiconductor control rectifier-laterally diffused metal-oxide semiconductor （STSCR- LDMOS） stacked structure is proposed and simulated using the transimission line pulser （TLP） multiple-pulse simulation method in a 0.35μm, 60-V biploar-CMOS-DMOS （BCD） process without additional masks. On account of a very low holding voltage, it is susceptible to latch-up-like danger for the semiconductor control rectifier-laterally diffused metaloxide semiconductor （SCR-LDMOS） in high-voltage electro-static discharge （ESD） protection applications. Although the conventional stacking structure has achieved strong latch-up immunity by increasing holding voltage, excessive high trigger voltage does not meet requirements for an ESD protection device. The holding voltage of the proposed stacked structure is proportional to the stacking number, whereas the trigger voltage remains nearly the same. A high holding voltage of 30.6 V and trigger voltage of 75.4 V are achieved.A novel substrate trigger semiconductor control rectifier-laterally diffused metal-oxide semiconductor （STSCR- LDMOS） stacked structure is proposed and simulated using the transimission line pulser （TLP） multiple-pulse simulation method in a 0.35μm, 60-V biploar-CMOS-DMOS （BCD） process without additional masks. On account of a very low holding voltage, it is susceptible to latch-up-like danger for the semiconductor control rectifier-laterally diffused metaloxide semiconductor （SCR-LDMOS） in high-voltage electro-static discharge （ESD） protection applications. Although the conventional stacking structure has achieved strong latch-up immunity by increasing holding voltage, excessive high trigger voltage does not meet requirements for an ESD protection device. The holding voltage of the proposed stacked structure is proportional to the stacking number, whereas the trigger voltage remains nearly the same. A high holding voltage of 30.6 V and trigger voltage of 75.4 V are achieved.

关 键 词：electrostatic discharge high holding voltage LATCH-UP STSCR-LDMOS 

分 类 号：TM461[电气工程—电器]