混合同余法产生随机噪声的FPGA实现  

Mixed congruential method to generate random noise on FPGA

作　　者：秦雪陈 

机构地区：[1]河海大学计算机与信息学院,江苏南京211100

出　　处：《电子设计工程》2015年第9期123-126,共4页Electronic Design Engineering

摘　　要：随着电子对抗技术的快速发展,在有源式干扰机中需要用到数字高斯白噪声。通过对混合同余法产生随机序列的原理研究,本文提出了一种利用FPGA产生高斯白噪声的方法。该方法在PC主控端的控制下,采用ROM查找表的方式实现信号的产生。在混合同余法的原理基础上,设计利用MATLAB和QuartusⅡ软件对设计的高斯白噪声发生器进行仿真验证。应用Verilog HDL语言实现模块功能性,本设计采用Altera公司的StratixⅣ芯片EP4SGX230KF40C4ES。实验结果显示,本设计得到了稳定输出的数字高斯白噪声信号。With the rapid development of electronic warfare technology, digital Gaussian white noise is often be used.in the energy-transducer jammer, Through the study of the principles of the mixed congruential method to generate random sequences, this paper presents a method to generate Gaussian white noise based on FPGA. Under the control of the PC side, this method uses a ROM look-up table to generate signals. Departure from the principle of the mixed congruential method, software and hardware design of digital gaussian white noise generator by using MATLAB and Quartus Ⅱ is achieved. Apphed Verilog HDL to realize the module functional design, the system uses Stratix Ⅳ chip EP4SGX230KF40C4ES. The experimental result shows that the design has got stable digital Gaussian white noise signal output.

关 键 词：高斯白噪声 混合同余法 FPGA VERILOG HDL 

分 类 号：TN914.42[电子电信—通信与信息系统]