基于FPGA的SDRAM乒乓读写操作设计  

Design of the SDRAM Ping-pong Read-write Operations Base on the FPGA

作　　者：杨会建 田成军[1] 杨志娟[1] 廖醒宇 杨阳[1] 

机构地区：[1]长春理工大学电子信息工程学院,长春130022

出　　处：《长春理工大学学报（自然科学版）》2015年第2期67-71,75,共6页Journal of Changchun University of Science and Technology(Natural Science Edition)

摘　　要：针对视频图像采集系统中需要实时显示的数据存储效率问题,提出了一种基于FPGA的SDRAM乒乓读写操作设计。在研究SDRAM的基本原理和影响性能的主要参数的基础上,利用Verilog语言实现了SDRAM的初始化及自刷新。对SDRAM数据存储设计了一种乒乓读写操作控制方案,支持Bank切换存储,充分利用读写时差,提高了数据吞吐量。且对该控制方案中的多时钟域下的数据流交换设计了FIFO控制方案。用Modelsim仿真工具对Bank切换、SDRAM初始化、自刷新及乒乓读写进行了时序仿真。仿真波形表明该设计方案能很好的实现Bank切换及SDRAM的乒乓读写操作。For the problem of data storage efficiency in the video image acquisition system for real-time display,a de-sign of the SDRAM ping-pong read-write operations based on FPGA is put forward in this paper. On the research basis of the principle of SDRAM and performance of the main parameters, the initialization of SDRAM and self-re-freshing are realized with Verilog language. A ping-pong operation control scheme is designed for the SDRAM data storage, supporting Bank switching storage. Time difference of reading and writing is made full use and the data throughput is thus enhanced. Aiming at the data flow exchange under multiple clock domains in the control scheme, a FIFO control scheme is designed. Timing sequence simulation of Bank switching,SDRAM initialization,self-refreshing and ping-pong read-write operation is fulfilled with the simulation tool Modelsim. Simulation waveform shows the de-sign can realize Bank switching and the ping-pong read-write operations of SDRAM well.

关 键 词：SDRAM 乒乓操作 FPGA 多时钟域 时序仿真 

分 类 号：TP343[自动化与计算机技术—计算机系统结构]