软件与MBIST协同的片内SRAM测试方法研究  

Research on SRAM Testing Integrated in SoC of Software and MBIST

作　　者：廖寅龙[1] 田泽[1] 赵强[1] 刘敏侠[1] 

机构地区：[1]中航工业西安航空计算技术研究所,陕西西安710068

出　　处：《计算机技术与发展》2015年第6期155-157,162,共4页Computer Technology and Development

基　　金："十二五"微电子预研(51308010603;51308010710);总装预研基金(9140A08010712HK6101)

摘　　要：随着SoC电路功能的日益复杂,SoC电路中大量应用了内嵌随机静态存储器,传统的通过MBIST(存储器内建自测试)方式对SoC电路中SRAM的测试,将给SoC电路带来功耗及管芯面积显著增大的问题;同时在传统MBIST方式下,SoC内嵌SRAM的测试严重依赖先进的ATE测试设备,需要付出昂贵的测试成本。文中提出一种软件与MBIST相协同的SRAM测试方法,利用SoC内嵌处理器运行特定算法软件的方式,实现SoC电路中大部分SRAM的测试,同时结合传统MBIT测试方式对其余内嵌处理器难以访问的SRAM进行测试,既实现了复杂SoC中内嵌SRAM测试的完备性,也很好地解决了测试完备性与测试成本的矛盾。With the development of IC, system-on-chip may have many SRAM blocks, the traditional testing method according to MBIST could not only increase the huge numbers of test logic,chip power consumption,but also tie the test to advanced ATE test machine tightly which could also cost much. A kind of new SRAM test method by combining the software achievement and MBIST together is proposed to achieve the testing of SRAM integrated in SoC. The SRAM which could hardly be accessed by any other integrated pro-cessing units would also be tested by combing the traditional MBIT and the methods mentioned in this paper,not only achieving the test completeness of SRAM integrated in SoC,but also handling the conflict between full verification and cost.

关 键 词：SOC 存储器内建自测试 测试成本 

分 类 号：TP301[自动化与计算机技术—计算机系统结构]