基于VMT的USB2.0功能验证平台的设计与实现  

Design and Implementation of USB 2.0 Device Function Verification Platform Based on VMT

作　　者：金君潇 王亚军[1] 黄朴[1] 虞致国[1] 顾晓峰[1] 于宗光[2] 

机构地区：[1]江南大学电子工程系轻工过程先进控制教育部重点实验室,江苏无锡214122 [2]中国电子科技集团公司第58研究所,江苏无锡214035

出　　处：《电子与封装》2015年第6期23-27,43,共6页Electronics & Packaging

基　　金：江苏省自然科学基金(BK20130156);中央高校基本科研业务费专项资金(JUSRP1026);江苏省科技厅产学研联合创新资金(BY2013015-19);江苏省六大人才高峰资助项目(DZXX-027);江苏省普通高校研究生实践创新计划项目(SJZZ_0148)

摘　　要：针对大规模混合SoC功能验证速度慢的问题,在基于USB 2.0数据传输的SoC设计基础上,提出了一种能快速验证USB 2.0协议的功能验证平台。使用验证模型技术,通过硬件描述语言搭建了完整的协议验证平台,包括Vera语言编写的主机VIP、用Verilog语言编写的数字化USB收发器、串行接口引擎、端点缓存器、增强型8051核和外部程序存储器。完成了对USB 2.0底层协议的功能验证,包括高速握手协议、高速/全速设备枚举及高速/全速设备数据传输,实验仿真结果与USB 2.0协议规范完全符合。该平台能降低对USB 2.0接口进行功能协议一致性验证的难度,并有助于缩短大规模数模混合SoC的开发周期。In order to solve the slow function verification problem of the large-scale system-on-a-chip （SoC）, a rapid verification platform for USB 2.0 protocol is proposed based on the design of USB 2.0 data transmission SoC. By adopting the verification modeling technology, the whole platform is built by hardware description language, including the host verification intellectual property written by Vera language, the digitalized USB transceiver, the serial interface engine, the endpoint buffer, the enhanced 8051 core and the external ROM written by Verilog language. The platform can complete the function verification of the USB 2.0 low layer protocols, including the high speed handshake protocol, the high/full speed device enumeration and the high/full speed data transmission. The experimental simulation results are in good agreement with the USB 2.0 protocol specification, indicating that the platform can reduce the difficulties in verifying the USB 2.0 interface functional protocol conformance and decrease the developing period of large-scale mixed SoC.

关 键 词：USB 2.0 系统芯片 功能验证平台 验证模型技术 

分 类 号：TP302.1[自动化与计算机技术—计算机系统结构]