基于多模拟器协同模拟的微处理器验证技术研究  

Research of Microprocessor Verification Technique Based on Multi-simulator Co-simulation

作　　者：宋慧静 赵天磊[1] 吴虎成[1] 张民选[1] 

机构地区：[1]国防科学技术大学计算机学院,长沙410073

出　　处：《小型微型计算机系统》2015年第9期2130-2134,共5页Journal of Chinese Computer Systems

基　　金：国家自然科学基金项目(61202125)资助

摘　　要：提出并实现了一种基于Verilog模拟器与C模拟器协同模拟的微处理器验证平台Bug Finder.该平台通过System Verilog DPI(Direct Programming Interface)和操作系统共享内存机制,将待验证微处理器的RTL模型与GEM5模拟器相连,并自动比较每条指令的运行结果,可以发现深层次的设计错误并快速定位.在实际验证中的应用结果显示,Bug Finder平台可以快速定位到大量RTL设计和验证环境中的错误,有效缩短了处理器的验证周期.A Verilog and C Bug Finder based verification platform,Bug Finder,is proposed in this paper. This platform connects the microprocessor RTL design w ith the GEM5 simulator through System Verilog DPI. A control module is used to compare the results of every executed instruction betw een microprocessor RTL and GEM5. With this platform,RTL design bugs can be identified immediately w hen the bug is triggered by test programs. Therefore,the time consuming debug process can be accelerated greatly. The proposed platform is used in real w orld microprocessor design flow and quickly identifies lots of bugs in RTL design and verification environment.

关 键 词：微处理器验证 GEM5 SYSTEMVERILOG DPI 协同模拟 快速定位错误 

分 类 号：TP368[自动化与计算机技术—计算机系统结构]