基于Xilinx FPGA IP核的浮点频域脉冲压缩算法的设计与实现  

Design and Implementation of A Floating-point Frequency Domain Pulse Compression Algorithm Based on FPGA IP Xilinx Kernel

作　　者：邢冠培 孟凡利 

机构地区：[1]上海航天电子技术研究所,上海201109

出　　处：《无线互联科技》2015年第11期33-34,39,共3页Wireless Internet Technology

摘　　要：脉冲压缩体制雷达的发射信号通常包括多种线性调频信号,这就要求对回波信号的脉冲压缩处理适应性要强,如果采用定点脉压,不同信噪比的回波信号脉冲压缩结果的截位各不相同,需要分别进行仿真测试,以确定截位的位置,而文章提出一种浮点频域脉压的算法及实现,基于Xilinx FPGA IP核,无需考虑截位,对各种信号适应性强,方便易用。Pulse compression radar transmitting signal usually includes a variety of linear FM signal, which requires the echo pulse compression processing adaptability stronger, if the point pulse pressure and different signal to noise ratio of the echo signal pulse compression results truncate each are not identical, necessary to simulation test, to determine the truncation of the position, and the A floating-point pulse compression in frequency domain algorithm and implementation, based on Xilinx FPGA IP core, without considering the truncation and adaptability to various signal is strong, easy to use.

关 键 词：IP核 脉冲压缩 浮点 频域 

分 类 号：TN957.51[电子电信—信号与信息处理] TN791[电子电信—信息与通信工程]