基于硬件加速的实时仿真平台构建技术  

Design of Real-time Simulation Platform Based on Hardware Acceleration

作　　者：孔璐[1] 张涛[1] 王金波[1] 周珊[1] 

机构地区：[1]中国科学院空间应用工程与技术中心,北京100094

出　　处：《微电子学与计算机》2016年第1期34-36,共3页Microelectronics & Computer

基　　金：国家重大专项(Y214010RN)

摘　　要：针对复杂可编程逻辑设计及验证过程中仿真速度过慢的问题,提出了基于硬件加速的实时仿真平台构建技术.将可综合的逻辑代码下载到硬件平台中,不可综合的测试程序运行在仿真器软件中,并通过接口函数实现软、硬件之间的数据交互.实验结果表明,该技术能够有效提高仿真效率,同时具有操作灵活、可观测性强等优点.A real-time simulation platform based on hardware acceleration has been implemented since the simulation speed is too slow for complex integrated circuits.The codes which could be synthesized were downloaded to the hardware platform,while the other un-synthesizable ones were left running in simulation tools,and the data interaction between the hardware platform and the simulation tools is implemented by interface functions.The results of experiments indicate that the proposed platform,possessing fine flexibility and observability,can strongly heighten the simulation effort.

关 键 词：FPGA 硬件加速 实时仿真 HDL 

分 类 号：TP391.9[自动化与计算机技术—计算机应用技术]