雷达信号处理机并行自动测试系统设计  

Design of Automatic Test System for Parallel Radar Single Processor

作　　者：张晓曦[1] 吴翼虎[1] 刘永强[1] 

机构地区：[1]中航工业西安航空计算技术研究所,西安710065

出　　处：《计算机测量与控制》2016年第1期126-127,136,共3页Computer Measurement &Control

摘　　要：为了测试和评价某型雷达信号处理机的功能与性能,提供了一种以PCI总线为基础,结合虚拟仪器、数据库和直接数字频率合成等技术的多机并行自动测试系统设计,实现了为雷达信号处理机提供雷达回波模拟、高稳定度ADC采集时钟和多通道多类型信号输入,重点完成对雷达信号处理机多类型通讯总线测试和关键性能实时检测与分析,结合典型产品定量给出测试结果并分析,验证了测试系统的有效性。In order to test and evaluate the features and pertormance of a kind ol radar single processor, this article provtcles a multi-- parallel automatic test system design. It is on the basis of PCI bus combined with Lab Windows/CVI, Database and Direct Digital Synthesis technology. It has achieved a radar signal processor which can provide radar echo simulation, high stability ADC acquisition clock and multi --channel type pulse input. Furthermore it is focused on the completion of the multi--type radar signal processor bus test and analysis of key performance. Also it can provide quantitative test results and analysis combined with typical products. Finally, it has completed the verification of the effectiveness of the test system.

关 键 词：雷达 自动测试 多机并行 实时 

分 类 号：TP3[自动化与计算机技术—计算机科学与技术]