基于FPGA+DSP自适应干扰抑制VHF接收机研制  

Design and implementation of blind adaptive interference suppression VHF receiver based on FPGA+DSP

作　　者：王文益[1] 张鹏飞[1] 胡铁乔[1] 钟伦珑[1] 石庆研[1] 

机构地区：[1]中国民航大学智能信号与图像处理天津市重点实验室,天津300300

出　　处：《中国民航大学学报》2016年第1期10-14,共5页Journal of Civil Aviation University of China

基　　金：天津市科技支撑计划重点项目(10ZCKFGX04000);国家自然科学基金项目(61172112;61271404;61471363);中央高校基本科研业务费专项(3122014B001)

摘　　要：针对民航地空通信易受到无线电干扰的问题,通过合理选用现场可编程逻辑门阵列(FPGA)和数字信号处理器(DSP)搭建盲自适应干扰抑制接收机的信号处理平台,再配以具有VHF信号接收功能的射频前端电路和音频处理模块,实现接收、干扰抑制和解调的功能。其中信号处理平台主要包括:基于复数EASI算法的盲自适应干扰抑制、监视等核心模块。测试结果表明,与常规电台相比,盲自适应干扰抑制接收机能够有效地抑制AM、FM等多种干扰,输出清晰的话音信号。Aiming at the problem that air-ground communication of civil aviation is easily disturbed by radio interference, the reasonable selection of field-programmable gate array （FPGA） and high-speed digital signal processor （DSP） are introduced to build a signal processing platform with interference suppression receiver based on blind source separation （BSS）, coupling with the signal receiving circuit with RF front end which can receive VHF signal and audio processing module. The signal processing platform mainly includes a real-time, complex equivariant adaptive separation via independence （EASI） interference suppression algorithm core components. Compared with a normal receiver which is showed in the test results, the adaptive interference suppression receiver can suppress AM or FM interference more effectively and output clearer voice signal.

关 键 词：盲源分离 地空通信 干扰抑制 DSP FPGA 

分 类 号：TN911.7[电子电信—通信与信息系统]