一种新型二分电容DAC的设计  

Design of a Novel Two-Split Capacitor DAC

作　　者：郑迎新[1] 王宗民[1] 赵元富[1] 

机构地区：[1]北京微电子技术研究所,北京100076

出　　处：《微电子学》2016年第1期9-12,共4页Microelectronics

摘　　要：为了进一步减小电容阵列DAC占用的面积,提出了一种可用于SAR ADCs的二分电容阵列(三段电容阵列,T-SC)结构。与传统二段电容阵列相比,提出的二分电容阵列在不增加对电容匹配性要求的前提下,减少了芯片面积。在理论上分析了该结构的电容失配和寄生效应,归纳提出了一种计算电容阵列DAC DNL的简易公式。Matlab仿真结果与理论分析有较好的一致性,三段电容阵列结构能够实现较好的二进制权重特性;根据提出的计算DNL的简易公式进行参数设计,仿真DNL标准偏差为0.51LSB,与理论计算0.5LSB相差0.01LSB。To reduce furtherly the area of capacitor array,a novel two-split capacitor（T-SC）array was proposed,which could be used for SAR ADCs.Compared with the conventional split capacitor arrays,this new architecture could reduce the chips area without more matching requirements.A theoretical analysis was made on the mismatch and parasitic effects of capacitors,and a simple formula for calculating the DNL of DAC was concluded.Matlab results were in good agreement with that of the theoretical analysis.T-SC architecture could achieve good characteristics of binary-weight.Based on the parameters using the concluded simple formula,the standard deviation of DNL was 0.51 LSB,which was 0.01 LSB larger than the theoretical value.

关 键 词：电容DAC 电容失配 非线性 SAR ADC 小面积 

分 类 号：TN453[电子电信—微电子学与固体电子学]