高效低存储DWT的VLSI结构设计  

Highly efficient VLSI architecture for DWT with low-storage implementation

作　　者：董明岩[1] 雷杰[1] 王柯俨[1] 李云松[1] 

机构地区：[1]西安电子科技大学综合业务网理论及关键技术国家重点实验室,陕西西安710071

出　　处：《西安电子科技大学学报》2016年第2期35-40,共6页Journal of Xidian University

基　　金：国家优秀青年基金资助项目(61222101);国家自然科学基金资助项目(61301287;61301291);高等学校学科创新引智计划资助项目(B08038);中央高校基本科研业务费专项资金资助项目(K5051301043)

摘　　要：随着航天器载荷相机图像分辨率的日益提高,迫切需要解决海量图像数据的在轨高速编码处理问题,空间数据系统咨询委员会提出了一种面向空间应用的图像编码标准.为了保证较高的图像编码性能,该标准采用小波的变换方法.小波变换的多级变换形式比较耗时,且需要较大的存储开销.针对这一问题,提出了一种高效低存储离散小波变换的超大规模集成电路结构.通过改进传统的小波提升结构,将二三级变换和缓存结构进行复用,在不降低数据处理速度的情况下,节省了逻辑资源开销;使用少量片上存储资源存储部分小波系数,按特定顺序连续地输出给后级熵编码器进行处理,避免了使用片外存储.所提出的超大规模集成电路结构在Xilinx型号为XC4VSX55的现场可编程门阵列得到了硬件实现,具有95.91MPixels/s的数据处理性能.With the gradual increase in image resolution of the spacecraft camera,it is highly required to figure out the problem how to process a huge amount of image data on board at a high speed.As a solution,the CCSDS proposes a space-oriented image-coding standard.For the sake of high image-coding performance,it adopts wavelet transformation as a method of image data transformation.However,wavelet transformation contains multi-level data processing,which causes more computational time consumption and more memory utilization.In order to solve this problem,we propose a highly efficient VLSI architecture for DWT with low-storage.By revising the traditional lifting structure and employing time-multiplex data processing strategy to perform the second and third level of wavelet transformation by the same logic module,the usage of logic resource is reduced with no sacrifice on speed.Using a small amount of on-chip memory instead of off-chip memory to save certain parts of DWT coefficients and sending the coefficients in a specific sequence to entropy coder timely,the off-chip memory for storage of DWT coefficients is no longer required.The proposed VLSI architecture of DWT is already implemented on the Xilinx FPGA XC4VSX55,which can achieve a high performance,in terms of data throughput,reaching95.91MPixels/s.

关 键 词：图像处理 离散小波变换 现场可编程门阵列 超大规模集成电路 

分 类 号：TN919.81[电子电信—通信与信息系统]