MVB中继器编解码的设计与实现  

Design and Implementation of MVB Repeater Codec

作　　者：朱祥[1] 王立德[1] 聂晓波[1] 申萍[1] 

机构地区：[1]北京交通大学电气工程学院,北京100044

出　　处：《机车电传动》2016年第2期18-22,共5页Electric Drive for Locomotives

基　　金：中国铁路总公司科技研究开发计划课题(2015J011-F)

摘　　要：针对传统差分信号网络中继器不具备编解码能力,无法实现对MVB帧的特殊控制,提出一种基于FPGA的MVB中继器设计方案。详细分析了中继器解码器和编码器的设计过程,包括时延分析和计算、超长帧的判断和截断、帧间隔调整的时延整定与实现等方面的具体设计。通过实际测试,对时间参数进行分析对比,验证了设计的可行性。Since the traditional differential signal network repeater did not have the ability to codec and was unable to realize the special control of the MVB frames,a design of MVB repeater based on FPGA was put forward.The design processes of the repeater＇s decoder and encoder were analyzed in detail,including the repeater time delay analysis and calculation,the judgment and truncation of super-long MVB frames,the time delay setting and implementation of the interframe spacing adjustment,etc.Through the actual test and the comparative analysis of time parameter,the feasibility of the design was verified.

关 键 词：MVB中继器 多功能车辆总线 编码器 解码器 编解码 

分 类 号：U264.91[机械工程—车辆工程] TP393[交通运输工程—载运工具运用工程]