GPS信号并行捕获算法的FPGA实现  

Parallel acquisition algorithm for GPS signals based on FPGA

作　　者：卢洁莹[1] 马路[2] 

机构地区：[1]华南理工大学,广东广州510641 [2]中国科学院空间科学与应用研究中心,北京100190

出　　处：《电子设计工程》2016年第7期79-82,86,共5页Electronic Design Engineering

摘　　要：为了实现对GPS信号的快速捕获,通过分析和比较了几种现有算法,提出了基于平均采样的FFT并行捕获算法。为了避免平均采样跨越伪码的跳变沿而带来能量损失,采用了寻找伪码最大游程的方法,在最大游程里重新进行平均采样,使其多出一个码片的样点,通过仿真验证了该算法既避免了平均能量的损失,又便于硬件实现。为了便于硬件实现,设计了捕获算法的系统结构和各个子模块的FPGA结构;通过功能仿真,分析验证了算法的可行性。In order to realize rapid acquisition of GPS signals, a parallel acquisition algorithm based on average sampling method is proposed and analyzed. Moreover, a longest run-length resampling method is employed to overcome energy loss due to averaging across the bit edge. Further, the system structure and its implementation are given based on FPGA. Simulation resuits validate the feasibility and efficiency of our design.

关 键 词：平均采样 FFT 并行捕获 FPGA 有限状态机 

分 类 号：TN911.72[电子电信—通信与信息系统]