一款高增益、低功耗、宽带宽全差分运放设计  

Design of a Fully Differential High Gain and Low-power and High Bandwidth Amplifier

作　　者：周吉[1] 龚敏[1] 高博[1] 

机构地区：[1]四川省微电子技术重点实验室四川大学物理学院,成都610064

出　　处：《电子与封装》2016年第5期26-30,共5页Electronics & Packaging

摘　　要：基于SMIC 0.18μm工艺模型设计了一种低电压1.8 V下的高增益、低功耗、宽输出摆幅、宽带宽的运算放大器电路。采用增益自举技术的折叠共源共栅结构极大地提高了增益,并采用辅助运放电流缩减技术有效地降低了功耗,且具有开关电容共模反馈(SC-CMFB)电路。在Cadence spectre平台上仿真得到运放具有极高的开环直流增益(111.2 d B)和1.8 V的宽输出摆幅,单位增益带宽576 MHz,相位裕度为58.4°,功耗仅为0.792 m W,在1 p F的负载时仿真得到0.1%精度的建立时间为4.597 ns,0.01%精度的建立时间为4.911 ns。A Low-voltage 1.8 V with High Gain and High unity bandwidth and low-power integrated operational amplifier was designed based on SMIC 0.18 μm CMOS process. Adopted gain-boosting technique in folded-cascode architecture greatly raised the gain. Used assisted-amplifier current scaling-down technique effectively reduced the power consumption,also had SC-CMFB circuit. Simulation results on Cadence spectre show that the DC open-loop gain is 111.2 d B and 1.8 V output swing with a unity gain frequency of 576 MHz and phase Margin of 58.4°,0.792 m W power dissipation only.Besides 4.597 ns setting time of a 0.1% accuracy and 4.911 ns setting time of a 0.01% accuracy under the 1 p F load.

关 键 词：低功耗 运算放大器 高增益 宽带宽 折叠共源共栅 

分 类 号：TN402[电子电信—微电子学与固体电子学]