集成电路可测试性设计与验证  

Design and Verification of Integrated Circuit Testability

作　　者：吴立斌[1] 

机构地区：[1]中国人民解放军装甲兵工程学院,北京100072

出　　处：《无线互联科技》2016年第11期113-114,132,共3页Wireless Internet Technology

摘　　要：文章介绍了集成电路系统芯片(So C)以及IP核相关理论知识,对DFT集成电路可测试性设计进行了概述,给出了几种常用IC产品的测试方法,并对以后DFT可测试性设计的发展进行了论述;提出了一种基于图像处理的多级滤波芯片DFT测试进行分析,给出了DFT Compiler软件实验验证报告,有效地提高了测试覆盖率。This paper introduces the integrated circuit system on chip （SOC） and IP related theoretical knowledge, on the DFT integrated circuit can be design for testability are outlined, gives several commonly used IC product test methods and of DFT can be the development of design for testability are discussed; puts forward a test based on the analysis of image processing of multilevel filter chip DFT, given the DFT compiler software for experimental validation report, effectively improves the test coverage.

关 键 词：集成电路 DFT 边界扫描测试 设计验证 

分 类 号：TN407[电子电信—微电子学与固体电子学]