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作 者:张永华 S.Karthikeyan 张健
机构地区:[1]Department of Electronic Science and Engineering,East China Normal University [2]Department of Electrical and Computer Engineering,University of Minnesota
出 处:《Chinese Physics Letters》2016年第6期86-89,共4页中国物理快报(英文版)
基 金:Supported by the State Scholarship Fund of China;the Open Research Fund of Shanghai Key Laboratory of Multidimensional Information Processing of East China Normal University
摘 要:As a potential flexible substrate for flexible electronics, a polymer-sandwiched ultra-thin silicon platform is stud- ied. SU-8 photoresist coated on the silicon membrane improves its flexibility as shown by an ANSYS simulation. Using the plasma enhanced chemical vapor deposited Si02/Si3N4 composite film as an etching mask, a 4" silicon- (100) wafer is thinned to 26[tm without rupture in a 30wt.% KOH solution. The thinned wafer is coated on both sides with 20 pm of SU-8 photoresist and is cut into strips. Then the strips are bent by a caliper to measure its bending radius. A sector model of bending deformation is adopted to estimate the radius of curvature. The determined minimal bending radius of the polymer-sandwiched ultra-thin silicon layer is no more than 3.3mm. The fabrication process of this sandwich structure can be used as a post-fabrication process for high performance flexible electronics.As a potential flexible substrate for flexible electronics, a polymer-sandwiched ultra-thin silicon platform is stud- ied. SU-8 photoresist coated on the silicon membrane improves its flexibility as shown by an ANSYS simulation. Using the plasma enhanced chemical vapor deposited Si02/Si3N4 composite film as an etching mask, a 4" silicon- (100) wafer is thinned to 26[tm without rupture in a 30wt.% KOH solution. The thinned wafer is coated on both sides with 20 pm of SU-8 photoresist and is cut into strips. Then the strips are bent by a caliper to measure its bending radius. A sector model of bending deformation is adopted to estimate the radius of curvature. The determined minimal bending radius of the polymer-sandwiched ultra-thin silicon layer is no more than 3.3mm. The fabrication process of this sandwich structure can be used as a post-fabrication process for high performance flexible electronics.
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