一种多核处理器中断控制器的设计  

Design of An Interrupt Controller for Multi-core Processor

作　　者：张海金[1] 张洵颖[1] 肖建青[1] 

机构地区：[1]西安微电子技术研究所,陕西西安710065

出　　处：《微电子学与计算机》2016年第7期69-73,共5页Microelectronics & Computer

摘　　要：为适应多核处理器对中断处理的需求,基于Open PIC协议设计实现了一种多核处理器的中断控制器,并使用VHDL语言对其进行了硬件描述.该中断控制器作为APB从机,能够根据中断的目标、优先级的配置情况以及处理器核的中断处理情况实现中断在多个处理器核间的自由分配.本文将中断仲裁、选择和分配进行流水化处理,从而实现中断的快速准确分配.To meet the needs of multi-core processor for interrupt handling,this paper designs and implements an interrupt controller for multi-core processor based on the Open PIC protocol.The structure of the interrupt controller is described by VHDL.As a slave of Advanced Peripheral Bus（APB）,this interrupt controller can dispatch interrupts based on the interrupts＇ destination and priority,the interrupt handling of the processor cores is also considered.With the pipeline of interrupt arbitration,selection and dispatch,this interrupt controller can dispatch interrupts quickly and accurately.

关 键 词：中断仲裁 中断选择 中断分配 流水 

分 类 号：TP302.2[自动化与计算机技术—计算机系统结构]