具有统一时间标志的多路数据采集系统设计  

Multi-Channel Data Acquisition System Design with a Unified Time Mark

作　　者：卫霞[1] 张丽红[1] 郭艳艳[1] 

机构地区：[1]山西大学物理电子工程学院,山西太原030006

出　　处：《测试技术学报》2016年第3期267-271,共5页Journal of Test and Measurement Technology

摘　　要：在多路模拟量与数字量采集系统中,因数字量信号发送时间的随机性,无法得到周期性的数字量接收时间信息.本文提出了一种在同一时间坐标系下测试分析模拟量和数字量数据的设计方案,将ADC采样时钟作为同步时钟信号,在串口接收数据的空闲时间段内,利用FPGA将数字量数据与同步时钟信息进行混合编帧,使采集系统有了在同一时间域下的完整数据,并使用QuartusⅡ软件进行了仿真与分析.经实践应用,验证了该方法的可行性.It＇s unable to get a periodic digital receiving time information due to the digital signals sent randomly.a multi-channel analog and digital acquisition system,designing scheme was put forward that tests and analyzes analog and digital data in the same time coordinate system.A ADC sampling clock as was used the synchronous clock signal of this system.When a serial port does not deal with data receiving,digital data and synchronous clock information are mixed as a frame based on FPGA so that a complete data can be obtained at the same time domain in acquisition system.At last,the QuartusⅡ software has carried on the simulation and analysis.Besides,practical application has verified the feasibility of this method.

关 键 词：数据采集 统一时间标志 混合编帧 FPGA 

分 类 号：TP274.2[自动化与计算机技术—检测技术与自动化装置]