一种超小型DC^18 GHz MMIC 6 bit数字衰减器  

A Microminiature DC-18 GHz MMIC 6 bit Digital Attenuator

作　　者：谢媛媛[1] 陈凤霞[1] 高学邦[1] 

机构地区：[1]中国电子科技集团公司第十三研究所,石家庄050051

出　　处：《半导体技术》2016年第8期580-585,共6页Semiconductor Technology

摘　　要：微波单片集成电路(MMIC)数字衰减器的尺寸是芯片成本最主要的决定因素。基于GaAs E/D PHEMT工艺,研制了一款超小型DC^18 GHz 6 bit数字衰减器,芯片上集成了4 bit反相器。重点介绍了数字衰减器拓扑结构的改进及反相器的逻辑单元等电路设计的关键点。通过在衰减器拓扑中共用接地通孔、合并两个小衰减位、缩小微带线宽度和线间距、缩小薄膜电阻尺寸、减少控制电压压点个数,实现了芯片的超小型化,从而降低了MMIC数字衰减器的成本。测试结果表明,在DC^18 GHz频段内,数字衰减器的插入损耗小于6 d B,全态输入输出驻波比(VSWR)小于1.6,全态均方根误差小于0.7 d B,工作电流小于5 m A。数字衰减器芯片面积为1.45 mm×0.85 mm。The size of the microwave monolithic integrated circuit（ MMIC） digital attenuator is the most important determinant of chip cost. Based on Ga As E / D PHEMT process,a microminiature DC-18 GHz 6 bit digital attenuator integrated with a 4 bit inverter on the chip was developed. The improvement of the digital attenuator topology and key points of circuit design including the logical unit of inverters were emphatically introduced. The microminiature of the chip was realized by sharing the grounding via holes in attenuator topology,uniting two small amplitude attenuators,narrowing microstrip lines and the space between them,downsizing the thin film resistors and reducing the numbers of control voltage pads. Accordingly,the cost of the MMIC digital attenuator was decreased. The measurement results show that at DC- 18 GHz,the insertion loss of the digital attenuator is less than 6 d B,at all states conditions,the input and output voltage standing wave ratio（ VSWR） is less than 1. 6,the root mean square（ RMS） error is less than 0. 7 d B,and DC current is less than 5 mA. The area of the digital attenuator is 1. 45 mm × 0. 85 mm.

关 键 词：微波单片集成电路(MMIC) 超小型 数字衰减器 GaAs E/D PHEMT 直接耦合场效应晶体管逻辑(DCFL)单元 

分 类 号：TN715[电子电信—电路与系统]