基于JESD204B接口协议的接收端电路研制  

Implementation of a receiver circuit of JESD204B interface protocol

作　　者：吴让仲[1] 杨敏[1] 刘建[1] 姚亚峰[1] 

机构地区：[1]中国地质大学机械与电子信息学院,武汉430074

出　　处：《电子技术（上海）》2016年第11期86-90,共5页Electronic Technology

基　　金：湖北省自然科学基金面上项目(2014CFB896)资助课题

摘　　要：文章提出了一种符合JESD204B协议规范的接收电路设计方案。首先根据设计需求进行分析,对接收电路的总体架构自顶而下地进行了设计。其次,分析了接收电路的组成框架及各个子模块的设计思路和功能,完成了JESD204B接口传输层、链路层的设计。具体包括传输层的数据解帧模块设计和链路层的字符替换、解扰、解码、缓存buffer等模块设计。此外还设计了字符定界、物理层测试、错误检测和ILAS序列检测等电路模块,最终完成了一个符合JESD204B协议规范的接收电路完整设计。最后在XILINX公司的Vivado平台对整个接收电路的设计进行了仿真和综合,并且与第三方IP核发送端电路进行对接和环回验证。结果表明,本设计能够与第三方IP对接成功,完全符合协议规范和性能要求。This paper presents a solution of protocol JESD204B receiver＇s design and verification. First analyzed according to design requirements, the overall architecture of the receiving circuit design from top to bottom. Secondly, the design and functionality of the composition frame receiving circuit and various sub-modules, completing the JESD204B interface to the transport layer, data link layer design. Wherein the link layer is mainly composed of： replace characters, descrambling, decoding, the cache buffer modules, to the transport layer module complete solution for data frames. There is also a character-delimited, physical layer testing, error detection, and ILAS sequence detection modules. Finally, XILINX Company Vivado platform for simulation and preliminary synthesis, and the official version of IP core JESD204B 6. lv docking verify the sender. Simulation results show that： the program can successfully docked at JESD204B specified operating mode, complete the receiving circuit functional requirements.

关 键 词：JESD204B Serdes接口 接收端 电路设计 现代信号处理 

分 类 号：TN919.3[电子电信—通信与信息系统]