Novel design techniques for noise-tolerant power-gated CMOS circuits  

作　　者：Rumi Rastogi Sujata Pandey 

机构地区：[1]Department of Electronics and Communication Engineering,Amity University Uttar Pradesh,Noida,India

出　　处：《Journal of Semiconductors》2017年第1期106-112,共7页半导体学报（英文版）

摘　　要：In this paper we have investigated the single phase sleep signal modulation technique,step-wise V_（gs）technique and the three-phase reactivation technique to evaluate the noise characteristics of multi-threshold CMOS circuits used in communication systems.The stacking technique is also implemented in this paper for the sleep transistor.The stacking approach helps to minimize leakage power.The mode transition noise minimization techniques have been applied to 32-bit dynamic TSPC adder with stacked sleep transistors in a standard 45-nm CMOS process.The reactivation noise,delay and energy consumption of all the three techniques have been evaluated.It has been shown that the three phase modulation technique significantly minimizes the reactivation delay when the peak noise level is maintained the same for all three techniques.The three phase modulation technique shows 67.3%and 35%reduction in delay compared to the single phase and step-wise Vgs modulation techniques respectively.The reactivation energy is also suppressed by 49.3%and 39.14%with respect to the single-phase and stepwise Vgs techniques.In this paper we have investigated the single phase sleep signal modulation technique,step-wise V_（gs）technique and the three-phase reactivation technique to evaluate the noise characteristics of multi-threshold CMOS circuits used in communication systems.The stacking technique is also implemented in this paper for the sleep transistor.The stacking approach helps to minimize leakage power.The mode transition noise minimization techniques have been applied to 32-bit dynamic TSPC adder with stacked sleep transistors in a standard 45-nm CMOS process.The reactivation noise,delay and energy consumption of all the three techniques have been evaluated.It has been shown that the three phase modulation technique significantly minimizes the reactivation delay when the peak noise level is maintained the same for all three techniques.The three phase modulation technique shows 67.3%and 35%reduction in delay compared to the single phase and step-wise Vgs modulation techniques respectively.The reactivation energy is also suppressed by 49.3%and 39.14%with respect to the single-phase and stepwise Vgs techniques.

关 键 词：MTCMOS noise tolerant low power 

分 类 号：TN761[电子电信—电路与系统]