一种基于40nm CMOS工艺的电流舵DAC IP核设计  

Design of a Current-Steering DAC IP Core Based on 40 nm CMOS Process

作　　者：王东[1,2] 陈岚[1,2] 冯燕[1,2] 

机构地区：[1]中国科学院微电子研究所,北京100029 [2]三维及纳米集成电路设计自动化技术北京市重点实验室,北京100029

出　　处：《微电子学与计算机》2017年第2期25-29,共5页Microelectronics & Computer

摘　　要：基于SMIC 40nm CMOS工艺,设计了一种10位100MS/s DAC IP核.该DAC IP核采用6+4分段式电流舵结构,1.1V/2.5V双电源供电,满量程输出电流为20mA.完成了DAC IP核电路和版图的原型设计,提取了物理模型与时序模型,组成基本的数据交付项.对该DAC IP核进行了仿真分析,给出了流片后的测试结果.Based on SMIC 40 nm CMOS process, a 10 bit 100MS/s DAC IP core was designed. A 6＋4 segmented current-steering architecture was employed in the DAC IP core, and the full-scale output current was 20 mA with 1.1 V/2. 5 V dual power supplies. For the DAC IP core, the prototype design of circuit and layout was completed, and the physical model and timing model were obtained to form the data deliveries. The simulation analysis of the DAC IP core was carried out, and the test results after tape-out were presented.

关 键 词：数模转换器 分段式电流舵 IP核 

分 类 号：TN792[电子电信—电路与系统] TN402