检索规则说明:AND代表“并且”;OR代表“或者”;NOT代表“不包含”;(注意必须大写,运算符两边需空一格)
检 索 范 例 :范例一: (K=图书馆学 OR K=情报学) AND A=范并思 范例二:J=计算机应用与软件 AND (U=C++ OR U=Basic) NOT M=Visual
机构地区:[1]广州均衡微电子科技有限公司,广州510006 [2]广东工业大学,广州510006
出 处:《微电子学》2017年第1期30-34,共5页Microelectronics
摘 要:基于SMIC 0.18μm标准CMOS工艺,设计了一种应用于40MHz采样频率的14位高精度流水线ADC电路的运算跨导放大器,包括增益级电路、前馈级电路、共模反馈及偏置电路。放大器的输入增益级采用带正反馈环路的增益自举技术,在低频时实现了较高的增益。区别于传统频率补偿技术,使用一种新型无密勒电容的前馈频率补偿方案,实现了在不同工作状态下的频率补偿。仿真结果表明:在3V电源电压下,运放的直流增益为156dB,单位增益带宽积为1.03GHz,输出摆幅为2.5V,建立时间为9.3ns,可满足高精度流水线ADC性能要求。An operational transconductance amplifier(OTA) was applied to a 14 bit resolution, 40 MHz sampling frequency high precision pipelined ADC circuit. The circuit was fabricated in a 0. 18 gm standard CMOS process provided by SMIC. The OTA included gain stage circuits, feed forward stage circuits, common mode feedback circuits and bias circuits. The OTA's input gain stage used a positive feedback loop gain bootstrap technique to achieve a high gain at low frequencies. Different from the traditional frequency compensation techniques, the OTA used a novel feed forward frequency compensation technique without Miller capacitor, which had realized the frequency compensation in different working conditions. The simulation results showed that the DC gain was 156 dB, the unit gain bandwidth product was 1.03 GHz, the output swing was 2.5 V, and the settling time was 9.3 ns at 3 V supply voltage. It met the requirements of high-precision DiDelined ADCs.
关 键 词:流水线ADC 运算跨导放大器 增益自举 前馈补偿
分 类 号:TN432[电子电信—微电子学与固体电子学]
正在载入数据...
正在载入数据...
正在载入数据...
正在载入数据...
正在载入数据...
正在载入数据...
正在载入数据...
正在链接到云南高校图书馆文献保障联盟下载...
云南高校图书馆联盟文献共享服务平台 版权所有©
您的IP:216.73.216.15