一种可复用的SPI接口设计与实现  

Design and Implementation of Reusable SPI Interface

作　　者：朱道山[1] 

机构地区：[1]中国西南电子技术研究所,四川成都610036

出　　处：《通信技术》2017年第2期389-392,共4页Communications Technology

摘　　要：基于SPI接口标准的研究,提出一种新型的可复用SPI接口设计方案。通过重新设计SPI接口,解决了SPI无法由从设备发起通信以及传输无反馈的不足。时钟分频采用约翰逊计数器实现,保证了SPI在没有应答机制的情况下数据传输的正确性。该设计基于FPGA实现,并在Qusetasim仿真环境下验证通过。设计满足SPI接口串行数据高速传输的要求,性能可靠,可作为独立的IP核应用于微处理器之间的数据传输。Based on the investigation of SPI interface standard, a new design scheme of reusable SPI interface is proposed, and with the new design of SPI interface the disadvantage is solved that the communication couldn＇t be triggered by the slave module and the transmission takes no feedback when using general SPI protocol. And with the adoption of Johnson counter for clock frequency dividing, the validity of data transmission in NAK mechanism is guaranteed. This proposed scheme, implemented on FPGA, is verified in Qusetasim simulation environment. Experimental results indicate that this proposed scheme could meet the requirement of high-rate data transmission, and for its reliability in performance, could also serve as a new IP core for data communication of between MPUs.

关 键 词：SPI接口 FPGA 复用 IP核 约翰逊计数器 

分 类 号：TN911.7[电子电信—通信与信息系统]