多通道均方根值-平均值检波器的FPGA设计  

Implementation of multi-channel RMS-Average detector on FPGA

作　　者：张超[1,2] 许建华[2] 张志[2] 

机构地区：[1]电子测试技术科技重点实验室,青岛266555 [2]中国电子科技集团公司第41研究所,青岛266555

出　　处：《国外电子测量技术》2017年第1期43-46,52,共5页Foreign Electronic Measurement Technology

摘　　要：均方根值-平均值(RMS-Average)检波器是CISPR16-1-1标准为有效抑制当今数字调制造成的脉冲干扰的影响而增加的一种新型加权检波器。首先分析了CISPR16-1-1标准中规定的RMS-Average检波器的频率响应曲线,然后给出了数字化RMS-Average检波器设计过程的差分方程,基于该差分方程给出了一种多通道均方根值-平均值检波器的FPGA实现结构,该结构特别适用于基于FFT的时域EMI测试接收机设计,最后通过实例验证给出了检波器阶跃响应曲线。该设计方法和FPGA实现结构在某时域EMI测试接收机的应用中,效果良好。RMS-Average Detector is a new CISPR weighting detector to better consider the Impact of impulsive disturbances used in digital modulation system.The first,this paper put forward difference equation of digital RMS-Average Detector,according to Frequency Response of RMS-Average Detector referencing to CISPR 16-1-1basic standard.The second,Implementation structure of Multi-channel RMS-Average Detector on FPGA is present in this paper.This Implementation structure could directly applicable to Time-domain EMI test receiver based on FFT.Lastly,step response of detector is obtained by simulation based on FPGA.This Method and implementation structure of FPGA is used in Time-domain EMI test receiver,and the application effect is all right.

关 键 词：时域EMI测量 CISPR 均方根值-平均值检波器 权重函数 

分 类 号：TN929.533[电子电信—通信与信息系统]