基于异构多核处理器的DVFS技术研究  

DVFS Technology based on Heterogeneous Multi-core Processor

作　　者：王胜[1] 徐文祥[1] 尹志杰[1] 

机构地区：[1]重庆邮电大学通信与信息工程学院,重庆400065

出　　处：《通信技术》2017年第3期565-570,共6页Communications Technology

摘　　要：随着半导体技术的发展,异构多核处理器的应用越来越广泛。低功耗是异构多核系统设计的主要任务之一。作为低功耗技术主流的DVFS技术,在同构多核系统中有着广泛应用,是当前研究的热点,但其在异构多核系统中的研究尚不成熟。因此,分别介绍异构多核处理器功耗模型与DVFS技术的基本原理和研究现状,调研近年来实时异构多核系统中基于DVFS技术的低功耗算法,并对各种算法进行分析。最后,根据当前的研究状况,指出该领域面临的挑战和未来的研究方向。With the development of semiconductor technology, the heterogeneous multi-core processor is more and more widely applied. Low power consumption is one of the major tasks in the design of heterogeneous multi-core systems. As a popular low-power technology, DVFS technology has a wide range of applications in homogeneous multi-core system and is the focus of current research, but the research of its application in heterogeneous multi-core system is not yet mature. Firstly, the heterogeneous muhi-core processor power consumption model, basic principles and current research status of DVFS technology are described respectively. Then, the DVFS low-power algorithms based on heterogeneous multi-core processor are summarized and analyzed. Finally, in accordance with the current research situation, the challenges encountered in this field and the future research direction are suggested.

关 键 词：异构多核处理器 动态电压频率调整 低功耗 实时系统 

分 类 号：TN401[电子电信—微电子学与固体电子学]