可见光通信中RS编译码FPGA硬件算法及具体实现  

Hardware algorithm for the Reed-Solomon codec based on FPGA and its realization

作　　者：胡鹏飞[1] 沈力[1] 宋茂江[1] 杨霏[1] 韩锋[1] HU Pengfei SHEN Li SONG Maojiang YANG Fei HAN Feng(Guizhou Institute of Metrology and Calibration, Guiyang 550003, Chin)

机构地区：[1]贵州省计量测试院,贵州贵阳550003

出　　处：《贵州科学》2017年第2期58-62,共5页Guizhou Science

摘　　要：遵循IEEE802.15.7可见光协议的设备应该支持两个强制模式PHY I和PHY II中的至少一个。基于FPGA的硬件结构特点,给出了符合IEEE802.15.7 PHY II模式的RS编码译码器的硬件算法及实现方式,在输入数据位宽固定的情况下,本编码译码器具有参数可变,工作速度高等特点,并且与系统中运行长度有限码有一定的搭配协调性,具有良好的纠错功能。The device that meets the standard IEEE802. 15. 7 for VLC must support at least one of the two enforcing modes-PHY I and PHY II. Based on the hardware configuration of FPGA,we proposed a hardware algorithm for the Reed-Solomon codec that support the PHY II mode of IEEE802. 15. 7,and elaborated its realization method. When the width of the input data is fixed,the codec has many advantages,such as variable parameter,high speed,in harmony with Run Length Limited codes in the system,and excellent error correction capacity.

关 键 词：可见光协议 参数可变 纠错 

分 类 号：TP25[自动化与计算机技术—检测技术与自动化装置]