基于延时链的高精度SRAM时序参数测量电路  

A High-Precision SRAM Timing Parameter Measurement Circuit Based on Delay Line

作　　者：姜彬[1] 张敏敏[1] 王琴[1] 蒋剑飞[1] 毛志刚[1] 

机构地区：[1]上海交通大学电子信息与电气工程学院,上海200240

出　　处：《微电子学与计算机》2017年第6期18-20,25,共4页Microelectronics & Computer

基　　金：国家自然科学基金项目(61176037)

摘　　要：本文提出并实现了一种用于测量SRAM时序参数的延时链电路,在SMIC 130nm工艺下精度可以达到4.9ps.该延时链电路包括可调链路和固定链路,可调链路由可编程粗调单元和精调单元组成,固定链路由固定单元组成.并将待测SRAM和测量电路集成入SOC系统中,从而实现SRAM的建立、保持和读写时间切换测量的功能.The paper mainly introduced a delay line circuit for SRAM timing parameter measurement. Under the process of SMIC 130nm, the precision could reach 4.9 ps. The delay chain circuit includes programmable and fixed path. Programmable path includes programmable coarse block and fine block; fixed path is made of fixed units. SRAM to be measured and measurement circuit are integrated to a SOC system so as to realize the SRAM function of establishment, hold and access time measurement.

关 键 词：延时链 SRAM时序参数 SOC 

分 类 号：TN4[电子电信—微电子学与固体电子学]