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机构地区:[1]中国联合网络通信有限公司网络技术研究院,北京100048 [2]北京中测安华科技有限公司,北京100085 [3]中国运载火箭技术研究院研究发展中心,北京100076
出 处:《电子与封装》2017年第6期31-35,共5页Electronics & Packaging
摘 要:用FPGA实现了多种垂直分层空时码(Vertical-Bell Laboratories Layered Space-Time,V-BLAST)检测算法,包括最大似然(Maximum Likelihood,ML)检测算法、破零(Zero Forcing,ZF)检测算法和最小均方误差(Minimum Mean Square Error,MMSE)检测算法。首先研究了MIMO V-BLAST系统架构、数学模型和多种接收机检测算法,分析了关键检测算法的特性和性能,重点使用Verilog硬件描述语言在Xilinx的Vertex4-VC4VSX55 FPGA开发板上实现了V-BLAST系统架构和三种检测算法,并通过仿真结果比较了每一种算法的复杂度和性能。仿真结果表明对于V-BLAST检测,ML具有最优的性能但复杂度最高;ZF算法具有较低的复杂度但比ML的性能略差;MMSE算法复杂度只比ZF算法略大但性能却有显著提升。The paper presents an FPGA implementation of various V-BLAST detection algorithms, such as Maximum Likelihood, Zero Forcing and Minimum Mean Squared Error. Firstly, the MIMO V-BLAST system structure, the mathematical models and a variety of receiver detection algorithms are studied in detail. Then the characteristic and performance of typical algorithms and focus on using the Verilog hardware description language are analyzed to implement the V-BLAST system architecture and the three detection algorithms on the Xilinx's Vertex4-VC4VSX55 FPGA. Ultimately, simulation results are compared with each other in terms of complexity and performance. Simulation analysis shows that ML has the best performance and the greatest complexity; ZF has lower complexity and a larger gap from the performance of ML; MMSE's complexity is a litter bigger than ZF algorithm with significantly improved performance.
关 键 词:多输入多输出 垂直分层空时编码 最大似然算法 最小均方算法 现场可编程门阵列
分 类 号:TN911.23[电子电信—通信与信息系统]
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