LTE-Advanced标准中一种基于反向重算的低存储容量Turbo码译码器结构设计  

A Memory Reduced Turbo Code Decoding Architecture for LTE-Advanced Standard Based on Reverse Recalculation

作　　者：詹明[1] 文红[2] 伍军[3] 

机构地区：[1]西南大学电子信息工程学院,重庆400715 [2]电子科技大学通信抗干扰技术国家级重点实验室,四川成都611731 [3]上海交通大学网络空间安全学院,上海200240

出　　处：《电子学报》2017年第7期1584-1592,共9页Acta Electronica Sinica

基　　金：国家自然科学基金(No.61572114;No.61671390;No.61401273);国家博士后科学基金(No.2015M570776);西南大学基本科研专项资金重点项目(No.XDJK2016B002)

摘　　要：在LTE-Advanced标准中,为满足移动环境下的低功耗要求,低存储容量的译码器结构设计引起了广泛关注.本文在分解Turbo码网格图的基础上,研究了前向状态度量的反向重算方法,提出了一种基于反向重算的低存储容量译码器结构设计方案.在Log-MAP算法下研究了一种适合反向重算的修正雅可比对数式实现方法,推导了反向重算的数学表达式,并给出了实现结构.结果表明,所涉及的反向重算译码结构,以很小的冗余计算为代价将存储容量降低了50%,译码性能非常接近Log-MAP算法,在冗余计算复杂度、存储容量和译码性能指标上具有更好的均衡性.In the LTE-Advanced standards,to satisfy the low-power dissipation requirement in mobile scenarios,a decoder with small memory size has attracted extensive attention. By decomposing the trellis diagram of the adopted turbo code,this paper proposes a memory reduced decoding architecture based on reverse recalculation. A modified Jacobian logarithm is specially investigated for the reverse recalculation,and the reverse recalculation in logarithmic domain and the realization structure are also presented. It shows that at the price of lowredundant calculation complexity,the memory size is reduced by 50%,while the decoding performance is very close to that of the Log-MAP algorithm. The proposed decoding scheme is superior to other decoding architectures in terms of dummy computation complexity,memory size and decoding performance.

关 键 词：LTE-Advanced标准 TURBO码 MAP算法 低存储容量译码器结构 

分 类 号：TN911.22[电子电信—通信与信息系统]