多模计数器静电放电损伤的失效分析  

Failure Analysis of a Multi-Module Counter Subject to Electrostatic Discharge Damage

作　　者：席善斌[1] 裴选[1] 刘玮 高兆丰[1] 彭浩[1] 黄杰[1] 

机构地区：[1]中国电子科技集团公司第十三研究所,石家庄050051

出　　处：《半导体技术》2017年第10期784-789,共6页Semiconductor Technology

摘　　要：静电放电(ESD)损伤会降低半导体器件和集成电路的可靠性并导致其性能退化。针对一款国产2-32型多模计数器的失效现象,通过分析该计数器的电路结构,利用X射线成像、显微红外热成像、光束感生电阻变化以及钝化层、金属化层去除等技术对计数器进行了失效分析,将失效点准确定位至输出端口逻辑单元电路的2只晶体管上。分析结果表明,多模计数器的ESD损伤使输出端口驱动晶体管以及为负载晶体管提供栅偏置的前级电路晶体管同时受损,导致计数器端口高、低电平输出均失效而丧失计数功能。对相关的失效机理展开了讨论,同时提出了在电路研制和使用过程中的ESD防护措施。Electrostatic discharge （ESD） damage presents a reliability and performance degradation problem for semiconductor devices and integrated circuits.Based on the failure phenomenon of a domestic 2-32 type multi-module counter,the failure analysis of the counter was carried out with the technologies of X-ray imaging,microscopic infrared thermal imaging,optical beam induced resistance change,passivation and metallization layer delamination by analyzing the circuit structure of the counter.The failure point was accurately localized on the two transistors in the output port logic unit circuit.The analysis results show that the output port driving transistor and the front-end circuit transistor providing gate bias to the loading one were damaged due to the ESD damage of the multi-module counter,resulting in the high-level and low-level output port failure and the loss of counting function of the counter.The related failure mechanism was discussed,the ESD protection measures in the process of circuit development and use were also proposed.

关 键 词：多模计数器 单片微波集成电路(MMIC) 静电放电(ESD) 失效分析 失效定位 

分 类 号：TN407[电子电信—微电子学与固体电子学] TN43