并行阵列机模拟器的设计与实现  

Design and realization of the simulator of parallel array machine

作　　者：杨柳 王亚刚 

机构地区：[1]西安邮电大学计算机学院,西安710121

出　　处：《信息技术》2017年第9期54-57,共4页Information Technology

基　　金：国家自然科学基金资助项目(61136002)

摘　　要：针对现代高性能多核处理器的设计周期长、复杂性高、难度大、软件开发相对滞后等一系列问题,文中设计与实现了针对西安邮电大学自主设计的ARM并行阵列机的模拟器ARMPSim。首先,实现对ARMPSim体系结构的支持,包括对目标机器指令集的支持和对目标机器存储结构的支持;其次,实现对验证需求的支持,包括实现可执行程序的装载、实现对并行程序仿真模型的支持、实现对仿真界面的支持、对单步、多步调试的支持等。ARMPSim的成功设计与实现给硬件设计人员提供设计方案并且让软件设计人员先于硬件的实现在模拟器上进行程序的开发。文中对计算机视觉标准OPENVX中的核函数分别进行串行处理和并行处理并通过ARMPSIM仿真,仿真结果计算出来的加速比显示大多数算法具有良好的线性加速。Aiming at a serious of problem that modern high-performance multi-core processor design cycle long,complex,difficult and software development is lagging,this paper designed and implemented ARM parallel array machine simulator ARMSSim for Xi＇an University of Posts and Telecommunications self-designed. First,it implemented support for ARM parallel array machine architecture,including the support for target machine instruction set,and support for the target machine storage structure. Second,it implemented support for verification requirements,including the realization of the executable program loaded,parallel programming model simulation, simulator interface and single-step, multi-step debugging. Design and realization of ARMSSim successfully provided hardware designers design guide and allows software designers to develop the software program on the simulator. The simulation results of the serial and parallel processing of the image processing algorithms about OPENCV show that the majority of the algorithm has good linear.

关 键 词：模拟器 SIMPLESCALAR ARM ELF文件 加速比 

分 类 号：TP302.1[自动化与计算机技术—计算机系统结构]