基于FPGA的VME总线多串口实验设计  

Design on experiment of VME bus multi-serial ports based on FPGA

作　　者：王鹏[1] 张士辉[1] 琚静 

机构地区：[1]甘肃交通职业技术学院信息工程系,甘肃兰州730070

出　　处：《实验技术与管理》2017年第10期143-145,共3页Experimental Technology and Management

基　　金：甘肃省高等学校科学研究项目(2015A-200);2016年度甘肃省高等教育内涵发展创新创业教育教学改革研究项目(2016Y-37);甘肃交通职业技术学院科学研究项目(2015Y-03)

摘　　要：将现场可编程门阵列技术与VME总线技术相结合,运用VHDL语言编程实现多波特率、多数据位、多停止位的多种类别、不同数量的串口,有益于培养学生的知识应用能力,提高工程实践能力,全面掌握串行通信技术。这种实验设计方式有效地实现了教学内容与生产现场实际需求的对接,扩展了实践教学的深度与广度。In combination of the field programmable gate array technology and the VME bus technology,the innovation of the serial communication experimental design is realized. By using the VHDL programming language,the multi-baud rate,multi-data bits,multi-stop bits of various categories,the different number of serial ports are achieved,which is beneficial to train the students ＇ knowledge application ability and improve their engineering practical ability,and is helpful for the students to master the serial communication technology comprehensively. This design method effectively realizes the connection of the teaching content to the actual demand of the field production,and expands the depth and breadth of the practical teaching.

关 键 词：多串口实验 实验教学 FPGA VME 

分 类 号：TP23[自动化与计算机技术—检测技术与自动化装置]